write a verilog code for displaying all "0 to 7" numbers in a seven segment display in ddr board.
The code for 7 segment display is written - I have also include reset pin for the better understanding of code (if you want you can remove it also). The screenshot of the simulation result is also attached to the code also
WRITTEN CODE -
module Display_ddr(A,B,C,D,E,F,G,in_num,reset);
input [3:0]in_num;
output A,B,C,D,E,F,G;
input reset;
reg [6:0]y;
always @(*)
begin
if (reset)
y = 7'h0;
else
begin
case (in_num)
4'b0000 : y = 7'h7E;
4'b0001 : y = 7'h30;
4'b0010 : y = 7'h6D;
4'b0011 : y = 7'h79;
4'b0100 : y = 7'h33;
4'b0101 : y = 7'h5B;
4'b0110 : y = 7'h5F;
4'b0111 : y = 7'h70;
default : y = 7'h0;
endcase
end
end
assign A = y[6];
assign B = y[5];
assign C = y[4];
assign D = y[3];
assign E = y[2];
assign F = y[1];
assign G = y[0];
endmodule
IF ANY HELP IS NEEDED FOR UNDERSTANDING THE CODE PLEASE COMMENT DOWN IN COMMENT SECTION - WILL ALWAYS HELP YOU FOR ANY QUERRY :)
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