Question

7.- Give the design, at the gate level, of a 2 inputs-4 outputs decoder, and using...

7.- Give the design, at the gate level, of a 2 inputs-4 outputs decoder, and using the designed decoder give the design of a multiplexer at the gate level. (10 points). You must give two designs.

Homework Answers

Answer #1

Decoder

A decoder is a combinational logic circuit that has n inputs and 2n outputs. One of these outputs will be 1 based on the combination of inputs present.

2 to 4 Decoder

Truth Table

From the truth table we can see that,

D0 =

D1 =

D2 =

D3 =

So, we can construct 2 to 4 decoder with 4 AND gates.

MULTIPLEXER

A Multiplexer is a combinational circuit that has maximum of 2n data inputs, n selection lines and single output line.

Truth Table

From the Truth table, we can directly write the output, Q as :

Q =

Implementation of 4-1 Multiplexer with 2 to 4 Decoder

Know the answer?
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for?
Ask your own homework help question
Similar Questions
Implement an octal to 7-segment decoder, using only a single 3-to-8 decoder module (with active-low outputs)...
Implement an octal to 7-segment decoder, using only a single 3-to-8 decoder module (with active-low outputs) plus seven additional gates – one gate per output. Each gate should have as few inputs as possible. Show your work and sketch the circuit.
Design a 4 to 16 decoder using Verilog HDL. The inputs are a four-bit vector W=...
Design a 4 to 16 decoder using Verilog HDL. The inputs are a four-bit vector W= [w1 w2 w3 w4] and an enable signal En. The outputs are represented by the 16-bit vector Y= [y0 y1 …..y15]. a) Write Verilog HDL behavioral style code for 2-to-4 decoder. b) Write Verilog HDL behavioral style code for 4-to-16 decoder by instantiation of 2-to-4 decoders.
Design a 4 to 16 decoder using Verilog HDL. The inputs are a four-bit vector W=...
Design a 4 to 16 decoder using Verilog HDL. The inputs are a four-bit vector W= [w1 w2 w3 w4] and an enable signal En. The outputs are represented by the 16-bit vector Y= [y0 y1 …..y15]. a) Write Verilog HDL behavioral style code for 2-to-4 decoder. b) Write Verilog HDL behavioral style code for 4-to-16 decoder by instantiation of 2-to-4 decoders.
Q1)Design a 3-bit full adder by using a 8x3 Decoder., Q2)Design a digital circuit by using...
Q1)Design a 3-bit full adder by using a 8x3 Decoder., Q2)Design a digital circuit by using a 8x1 multiplexer implementing the following Boolean equation.F(A, B, C, D) =∑(2, 3, 5, 7, 8, 9, 12, 13, 14, 15)
Design a combinational circuit with 4 inputs (A, B, C, D) and two outputs (F, G):...
Design a combinational circuit with 4 inputs (A, B, C, D) and two outputs (F, G): The F output becomes ‘1’ when the corresponding decimal value represented by the 4 input bits is divisible by 3 (for example, F=1 when input combination is 0011; as 0011is 3 in decimal that is div. by 3). The G output becomes ‘1’ when the corresponding decimal value represented by the 4 input bits is divisible by 5. Also, mention how many gate delays...
please answer the following questions!!!! 1. Draw the truth table and block diagram for a 2:4...
please answer the following questions!!!! 1. Draw the truth table and block diagram for a 2:4 decoder. Use positive logic inputs and a negative logic (also reffered to as an active low or inverted) enable line and negative logic outputs 2. Design a circuit to implement the 2: decoder block diagram in question 1 using only NAND gates and inverters. 4. Use a 4:1 multiplexer and a minimum number of exterel gates to implement a solution to F(0,3,4,7,10) 5. Use...
construct an 4 to 17 decoder with an enable input using two 3 to 8 decoders...
construct an 4 to 17 decoder with an enable input using two 3 to 8 decoders with enable inputs and one 1 to 2 decoder with enable inputs. Explain very briefly the functionality of this circuit.
1. write a truth table using this symbol: --> 2. write the inputs for the truth...
1. write a truth table using this symbol: --> 2. write the inputs for the truth table to the left of the --> and write the outputs for the truth table to the right of the --> 3. write the compliment, or NOT using ' As an example: The truth table for AND is written this way: A B --> A AND B 0 0 --> 0 0 1 --> 0 1 0 --> 0 1 1 --> 1 or...
Implement an encoder for 4 alphabetic characters (P, U, S, H) using a 2-to-4 Decoder and...
Implement an encoder for 4 alphabetic characters (P, U, S, H) using a 2-to-4 Decoder and Or gates. • Define the Truth Table to correctly light up the segments of a 7-segment display given two input switches (x1 and x0) representing the 4 combinations for the characters in this order ( 00 = P, 01=U, 10=S, 11=H) • Implement the circuit using the decoder and Or gates to achieve an encoder to a 7-segment display.
Design a combinational circuit with inputs a, b, c, d and outputs w, x, y, z....
Design a combinational circuit with inputs a, b, c, d and outputs w, x, y, z. Assume that the inputs a, b, c, d represent a 4-bit signed number (2s complement). The output is also a signed number in 2s complement which is 7 greater than the input if the input is less than 2, and is 3 less than the input if the input is greater than or equal to 2.