Question

Design a combinational circuit with 4 inputs (A, B, C, D) and two outputs (F, G): The F output becomes ‘1’ when the corresponding decimal value represented by the 4 input bits is divisible by 3 (for example, F=1 when input combination is 0011; as 0011is 3 in decimal that is div. by 3). The G output becomes ‘1’ when the corresponding decimal value represented by the 4 input bits is divisible by 5.

Also, mention how many gate delays are required to compute F and G output, respectively?

Clearly show the design steps: Draw the Truth Table, find equation of F using K-map and draw the circuit Diagram.

Answer #1

- I have given detailed handwritten notes.
- If you have any doubts or clarifications, please post on comment section.
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- Thanks in Advance

Design a combinational circuit with inputs a, b, c, d and
outputs w, x, y, z. Assume that the inputs a, b, c, d represent a
4-bit signed number (2s complement). The output is also a signed
number in 2s complement which is 7 greater than the input if the
input is less than 2, and is 3 less than the input if the input is
greater than or equal to 2.

My question: what is the truth table for full-comparator??
Full question: Design a comparator circuit for binary numbers
using only NAND gates. It should take as input two numbers
represented in standard binary, X and Y, and produce two outputs, G
and L, which indicate that X is Greater than or Less than Y,
respectively. If both outputs are zero, it indicates that the
values are equal. Design a half-comparator, full-comparator, and a
full four-bit comparator. With nothing more than...

Q.1.It is required to design an iterative
combinational circuit that computes the equation Z=2*X-3, where X
is an n-bit signed number in 2’s complement representation. (Hint:
-3 can be represented as -1+-1+-1 in 2’s complement representation,
where -1 is represented as 111…..111).
a)Determine the number of inputs and outputs
needed for your 1-bit cell. Explain the meaning of values in the
interface signals.
b)Derive the truth table of your 1-bit
cell.
c) Derive minimized equations for your 1-bit
using K-Map...

#9) You are to implement the following function
F(A,B,C,D,E,F) which outputs a 1 whenever the binary number
represented by ABCDE is ODD and 0 otherwise. A is the MSB and E is
the LSB.
Draw the function F(A,B,C,D,E,F) and show the work that led you
to that answer.
Since I am not so sadistic as to have you draw
the truth table of a 6 variable function and draw the K-map of such
a function, you should realize, as a...

Design a circuit that takes three bits, X2, X1, X0 as input and
produces one output, F. F is 0 if and only if 4<=X<=6 when X
= (X2, X1, X0) is read as an unsigned integer.
X2
X1
Xo
F
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1...

A decoder is a special type of circuit termed a control circuit
that is used to route data on a computer. This circuit has N inputs
and 2N outputs. The N input values are interpreted as a
single (unsigned) binary number representing a value between 0 and
2N-1. The decoder's job is to determine the value
represented on its N input lines and then to send a 1 to one output
line corresponding to this value. For example a 2-4...

1. Implement the given logic function using a 4:1 MUX. F(A,B,C)
= Σm(0,1,3,7)
Show the truth table, the 4:1 MUX schematic with the inputs,
select inputs and the output.
2. For an 8:3 priority encoder:
a) Draw the schematic.
b) Write the truth table.
c) Write the Boolean expressions for each of the outputs in
terms of the inputs.
d) Draw the logic circuit for the outputs in terms of the
inputs.

1) Implement the given logic function using a 4:1 MUX. (Ref: Lec
16, slide 5)
F(A,B,C) = Σm(0,1,3,7)
Show the truth table, the 4:1 MUX schematic with the inputs,
select inputs and the output.
2) For an 8:3 priority encoder:
a) Draw the schematic.
b) Write the truth table.
c) Write the Boolean expressions for each of the outputs in
terms of the inputs.
d) Draw the logic circuit for the outputs in terms of the
inputs.

Logic Circuit
Problem #3
Given the following logic function: F(a,b,c,d) = ?
m(0,3,7,9,11,13,15)+?d(4,6,8) use a Karnaugh Map to, a) Find a
minimal SOP expression Answer: F(a,b,c,d) = b) Find a minimal POS
expression
Answer: F(a,b,c,d) =
Problem #4
Implement the function F(a,b,c,d) given in problem #3 using two
3-to-8 decoders, both active low enabled and active low output.
F(a,b,c,d) = ? m(0,3,7,9,11,13,15)+?d(4,6,8)
Answer:
Problem #5
Implement the function in the previous problem: F(a,b,c,d) = ?
m(0,3,7,9,11,13,15)+?d(4,6,8), using a single 4...

Hardware security
HW-1
Combinational Logic
Q.1 a) Complete the truth table for the 4-inputs, 16 cells LUT (
Look-up Table) and map the follwing function on the LUT. Asume ‘a’
to the MSB ( Most significant bit) and lable all inputs and outputs
of the LUT.
F= a+bd
LUT
A
(MSB)
B
C
D
(LSB)
F
(output)
Draw the circuit level for the above function.
Q.2 Assume that a simple diagram of a
switch used in SRAM based FPGA...

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