Using the logic gates and the 7 segment theory, I need to print
the word "RIHAMSAM"....
Using the logic gates and the 7 segment theory, I need to print
the word "RIHAMSAM". PLEASE provide the TRUTH TABLE, K-MAP,
FUNCTION AND THE CIRCUIT DIAGRAM for the word "RIHAMSAM" using the
logic gates and 7-segment theory. I also need the picture of the
LOGIC CIRCUIT DIAGRAM. Thanks
Find a circuit of AND and OR gates to realize f (a, b, c, d) =...
Find a circuit of AND and OR gates to realize f (a, b, c, d) = Ʃ
m(1, 5, 6, 10, 13, 14)
a- Build the truth table
b- Find the Boolean expression
c- Draw the circuit
d- simplify f by using a Karnaugh map
e- Build the simplified truth table f- Re-draw the simplify
circuit
please answer the following questions!!!!
1. Draw the truth table and block diagram for a 2:4...
please answer the following questions!!!!
1. Draw the truth table and block diagram for a 2:4 decoder. Use
positive logic inputs and a negative logic (also reffered to as an
active low or inverted) enable line and negative logic outputs 2.
Design a circuit to implement the 2: decoder block diagram in
question 1 using only NAND gates and inverters.
4. Use a 4:1 multiplexer and a minimum number of exterel gates
to implement a solution to F(0,3,4,7,10)
5. Use...
1. Implement the given logic function using a 4:1 MUX. F(A,B,C)
= Σm(0,1,3,7)
Show the truth...
1. Implement the given logic function using a 4:1 MUX. F(A,B,C)
= Σm(0,1,3,7)
Show the truth table, the 4:1 MUX schematic with the inputs,
select inputs and the output.
2. For an 8:3 priority encoder:
a) Draw the schematic.
b) Write the truth table.
c) Write the Boolean expressions for each of the outputs in
terms of the inputs.
d) Draw the logic circuit for the outputs in terms of the
inputs.
1) Implement the given logic function using a 4:1 MUX. (Ref: Lec
16, slide 5)
F(A,B,C)...
1) Implement the given logic function using a 4:1 MUX. (Ref: Lec
16, slide 5)
F(A,B,C) = Σm(0,1,3,7)
Show the truth table, the 4:1 MUX schematic with the inputs,
select inputs and the output.
2) For an 8:3 priority encoder:
a) Draw the schematic.
b) Write the truth table.
c) Write the Boolean expressions for each of the outputs in
terms of the inputs.
d) Draw the logic circuit for the outputs in terms of the
inputs.
String splitting problem in C
A string like
GGB[BD]GB[DC,BD]WGB[BD]B[DC]B[BD]WB[CK,JC,DC,CA,BC]B[FB,EB,BD,BC,AB]
How do I split it to get...
String splitting problem in C
A string like
GGB[BD]GB[DC,BD]WGB[BD]B[DC]B[BD]WB[CK,JC,DC,CA,BC]B[FB,EB,BD,BC,AB]
How do I split it to get only whats inside the bracket with
C?
so i would get BD, DC, BD, BD,DC,BD, CK, JC, DC, CA, BC, FB, EB,
BD, BC, AB
and then get rid of duplicate
and get BD, DC, CK, JC, CA, BC, FB, EB, AB
I have an 4-bit unsigned Binary adder that performs F=A+B with
carry in and carry out,...
I have an 4-bit unsigned Binary adder that performs F=A+B with
carry in and carry out, I have to draw the smallest circuit using
the adder and whatever other combinational logic gates I need to
perform the 4-bit function below on 2's complement numbers A and
B
F=A+B if ADD=1,
F=A-B if ADD=0
Design a combinational circuit with 4 inputs (A, B, C, D) and
two outputs (F, G):...
Design a combinational circuit with 4 inputs (A, B, C, D) and
two outputs (F, G): The F output becomes ‘1’ when the corresponding
decimal value represented by the 4 input bits is divisible by 3
(for example, F=1 when input combination is 0011; as 0011is 3 in
decimal that is div. by 3). The G output becomes ‘1’ when the
corresponding decimal value represented by the 4 input bits is
divisible by 5.
Also, mention how many gate delays...