Question

Select all valid assertions

Select one or more:
a. Latches are synchronous sequential circuits

b. Basic gates are combinatorial elements that can be used to build a sequential circuit

c. With the same inputs, a sequential system can produce different outputs

d. Flip flops are controlled by the clock level

e. In a sequential system we can find a combinatorial subcircuit

Answer 1

Sol. (a) is not a valid assertion as the latches can be asynchronous also. It is not necessary to give clock pulse to the latches so that it becomes a synchronous sequential circuit.

(b) is a valid assertion as all the sequential circuits i. e flip flops, counters, latches etc. are made through the combination of basic gates only.

(c) is not valid because with same inputs a unique single is output is produced in a sequential circuit. With same input in different sequential circuits, different output is produced.

(d) is a valid assertion as flip flops are controlled by the clock levels or clock pulses. For every change in input a clock pulse is required in flip flops so that we get an output.

(e) is a valid assertion as all the sequential circuits are the combination of combinational subcircuits only. E. g-: Like SR and JK flip flops are a combination of AND and NOR gates.