Question

Multisim Please A Shift Register is a series of flip-flops connected so that data can be...

Multisim Please

A Shift Register is a series of flip-flops connected so that data can be transferred to a neighbor each time the clock pulse is active. These shift registers can be constructed using D or J-K flip-flops.

A shift register counter is a shift register with the serial output connected back to the serial input to produce special sequences. Two of the most common shift register counters are the Johnson Counter [Twisted Ring Counter] and the Ring Counter [Overbeck Counter].


Conduct research on what Ring Counter and Johnson Counter are and what their expected functions are. Include your research results in your lab report.


Build a 5-bit Ring Counter using J-K flop-flops, and again using D flip-flops. Include the state tables and confirm that each produces five states.

Build a 5-stage Johnson Counter using J-K flip-flops, and again using D flip-flops. Include the state tables and confirm that each produces ten states.


Create a new design file. In this design file, draw the circuit for all the four counters you have designed from step 1 and step 2. Apply the same clock source to all the four counters and use different LED arrays to demonstrate the outputs of each counter.


Run simulations to test your design. You run through all the possible states for your Ring Counters as well as your Johnson Counters. Capture a series of screenshots to show all the states of your counters in the correct sequence and include an explanation on how you can conclude that your counters are all functioning correctly.

Homework Answers

Know the answer?
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for?
Ask your own homework help question
Similar Questions
Multisim A Shift Register is a series of flip-flops connected so that data can be transferred...
Multisim A Shift Register is a series of flip-flops connected so that data can be transferred to a neighbor each time the clock pulse is active. These shift registers can be constructed using D or J-K flip-flops. A shift register counter is a shift register with the serial output connected back to the serial input to produce special sequences. Two of the most common shift register counters are the Johnson Counter [Twisted Ring Counter] and the Ring Counter [Overbeck Counter]....
Design a sequencer using J-K flip-flops that will sequence through the following states and then repeat...
Design a sequencer using J-K flip-flops that will sequence through the following states and then repeat the sequence in response to successive clock pulses:      0,1,3,5,7,4,0,………….. PLEASE INCLUDE ALL OF THE FOLLOWING: -a state diagram -a binary state transition table -K-maps and reduced expressions for all J-K inputs -logic diagram
Design a 6-bit, shift-right register with D flip flops, and use it to implement a circuit...
Design a 6-bit, shift-right register with D flip flops, and use it to implement a circuit that detects the sequence “010010” (the rightmost bit is the first arriving). Information shifts one position right when a positiv edge of clk occurs The circuit has the following inputs and outputs (use exactly these names for inputs and outputs. Respect upper and lower case): clk: Input. Clock signal. RST: Reset signal. When RST = 1 flip flops are reset to 0. IN: Data...
Design a 4-bit bidirectional shift register using JK Flip-Flop which is capable of storing data in...
Design a 4-bit bidirectional shift register using JK Flip-Flop which is capable of storing data in both serial and parallel fashion but produces output in parallel fashion only without the refreshing facility. Explain the working with the help of timing diagram.                                                                                                                                                          
Design a counter which counts in the sequence that has been assigned to you. Use D...
Design a counter which counts in the sequence that has been assigned to you. Use D flip flops and NAND gates. Simulate your design using SimUaid. Submit the state table, D flip-flop input equations, and transition graph determined in Part 6. The D flip-flop equations can be derived using Karnaugh maps or using LogicAid by entering a state table with zero input variables. Sequence: 000,100,001,110,101,111,(repeat) 000,... Also, please answer the following questions: How can a D flip-flop be set to...
Using T-Flip-flops, design a 3-bit register/counter circuit with bits [A2 A1 A0]. The circuit operations are...
Using T-Flip-flops, design a 3-bit register/counter circuit with bits [A2 A1 A0]. The circuit operations are described in the following table. Show all design details, i.e., write down steps and equations and draw the detailed circuit diagram. S2 S1 S0 Operation 0 0 0 No change 0 0 1 Rotate left 0 1 0 Rotate right 0 1 1 Reset 1 0 0 Set 1 0 1 Count down 1 1 0 Count up 1 1 1 Load external bits...
Sequence is 000,0110,111,100,101,001, (repeat)000,…
Sequence is 000,0110,111,100,101,001, (repeat)000,…· Design a counter that counts in the sequence assigned to you. Use D flip-flops, NAND gates, and inverters. Draw your circuit explicitly showing all connections to gate and flip-flop inputs.Explicitly means that you should draw in all wires, don’t just label the inputs and outputs. Show switches connected to thePreset and Clear inputs of the flip-flops. Use one switch for all clears and a separate switch for each preset.· Explain in detail how you can set...
Design an even parity detection circuit. A parity bit is an error checking mechanism. Your circuit...
Design an even parity detection circuit. A parity bit is an error checking mechanism. Your circuit will count the number of 1’s in a stream of bits. If the number of 1’s is even, the circuit turns on an output called Y. Assume a single bit at each cycle – call the input X. Do not use an accumulator or counter. Design the even parity detection circuit using J-K flip-flops. Your answer must include: a. The state diagram. b. The...
Please build the answer based on following sudying material : Reconciling the Revenu Québec Account. RQ’s...
Please build the answer based on following sudying material : Reconciling the Revenu Québec Account. RQ’s remittance forms provide the total year-to-date payments that have been received, excluding any CNESST premiums. Any discrepancies between RQ’s total and the employer’s total should be reported to RQ immediately. Note: Employers registered for My Account for Businesses can also confirm their year-to-date remittances to Revenu Québec on an ongoing basis throughout the year. The total dollar amount reported by RQ as being received...
Please answer the following Case analysis questions 1-How is New Balance performing compared to its primary...
Please answer the following Case analysis questions 1-How is New Balance performing compared to its primary rivals? How will the acquisition of Reebok by Adidas impact the structure of the athletic shoe industry? Is this likely to be favorable or unfavorable for New Balance? 2- What issues does New Balance management need to address? 3-What recommendations would you make to New Balance Management? What does New Balance need to do to continue to be successful? Should management continue to invest...