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design a serial binary pattern detector with a Moore FSM. serial input w send a new...

design a serial binary pattern detector with a Moore FSM.

serial input w send a new bit every clock cycle.

it shoud output a high value for output z if it detects either 1001 or 1110.

it shouldn't reset after reading 4 bits. ex) input 111001 create the output 00001001

a) state transition diagram

b) state transition table

c) output table

d) equations for output / next state

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