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We want to design a non-resetting sequence detector using a finite state machine (FSM) with one...

We want to design a non-resetting sequence detector using a finite state machine (FSM) with one input X and one output Y. The FSM asserts its output Y when it recognizes the following input bit sequence: "1101". The machine will keep checking for the proper bit sequence and does not reset to the initial state after it has recognized the string. [Note: As an example the input string X= "..1101101.." will cause the output to go high twice: Y = "..0001001.."]

a) Capture the Moore FSM.

b) Create the state tab

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