Question

Discuss the reasons for switching from Uni-processors to Multiprocessors. What are some of the things that need to be considered while transitioning from uni-processors to multiprocessors?

Answer 1

Uniprocessor :

- a sort of design that's supported one computing unit. All operations (additions, multiplications, etc ) area unitdone consecutive on the unit.

Multiprocessor :

- a sort of design that's supported multiple computing units. a number of the operations ( not all, mind you ) area unit drained parallel and also the results area unit joined subsequently.

There area unit many varieties of classifications for digital computer designs, the foremost unremarkably knownwould be the Flynn Taxonomy.

MIPS (originally associate signifier for chip while not Interlocked Pipeline Stages) may be a reduced instruction set pc (RISC) instruction set design (ISA) developed by unit of measurement Technologies.

The power limit has forced a dramatic amendment within the style of microprocessors. Since 2002, the speed has slowed from an element of one.5 each year to an element of one.2 per year. instead of continued to decrease the latency of one program running on the one processor, as of 2006, all desktop and server firms area unit shipping microprocessors with multiple processors per chip, wherever the profit is commonly a lot of on outturn than on latency. to scale back confusion between the words processor and chip, firms confer with processors as “cores,” and such microprocessors area unit generically known as multicore microprocessors.

Hence, a “quadcore” chip may be a chip that contains four processors or four cores. within the past, programmers may have confidence innovations in hardware, architecture, and compilers to double the performance of their programs each eighteen months while not having to alter a line of code. Today, for programmers to urge vitalimprovement in latency, they have to rewrite their programs to require advantage of multiple processors. Moreover, to urge the historic good thing about running quicker on new microprocessors, programmers can got tostill improve the performance of their code because the range of cores will increase.

Why Build Multi-Processor Systems

We still notice applications that need ever a lot of computing power. typically these issues may be solved by horizontally scaled systems (e.g. thousands of net servers). however some issues demand, no more computers, however quicker computers. contemplate one immense information, that every year, should handle double as several operations because it served the previous year. Distributed lockup, for therefore several parallel transactions on one information, may be prohibitively dearly-won. The (seemingly additionally prohibitively expensive) different would be to shop for an even bigger pc each year.

Long ago it had been potential to form computers quicker by shrinking the gates, dashing up the clock, and risingthe cooling. however eventually, we tend to reach some extent of decreasing returns wherever physics (the speed of sunshine, scientific theory, thermodynamics) makes it even harder to make quicker CPUs. Recently, most of our enhancements in process speed have come back from:

For these reasons, multi-processor is that the dominant design for powerful servers and desktops. And, because the dominant design, operative systems should do an honest job of exploiting them.

Multi-Processor Hardware

The on top of general definition covers a large vary of architectures, that really have terribly completely different characteristics. and then it's helpful, to summary the foremost outstanding architectures.

Hyper-Threading

CPUs area unit abundant quicker than a memory. A 2.5GHz computer hardware can be able to execute over fiveBillion directions for a second. sadly, 80ns memory will solely deliver twelve Million fetches or stores per second. this can be nearly a 1000x twin in performance. The computer hardware has multiple levels of cache to confirmthat we tend to rarely got to visit memory, however notwithstanding, the computer hardware spends an excellent deal of your time watching for memory.

The idea of hyper-threading is to allow every core 2 sets of general registers, and also the ability to run 2freelance threads. once one among those threads is blocked (waiting for memory) the opposite thread may be victimization the execution engine. think about this as non-preemptive time-sharing at the micro-code level. its common for a try of hyper-threads to urge one.2-1.8 times the directions per second that one thread would have gotten on an equivalent core. it's on the paper potential to urge 2x hyper-threading, however, a thread may run out of L1 cache for an extended time while not obstruction, or maybe each hyper-threads area unit blocked watching for memory.
Non-Uniform Memory Architectures

CC-NUMA is merely viable if we will make sure that the overwhelming majority of all memory references may be happy from native memory. Doing this seems to form loads of quality for the OS.

When we were discussing uni-processor memory allocation, we tend to determined that vital savings {could be|might be|can be|may be|may we tend toll be} achieved if we shared one copy of a load module among all processes that were running that program. This ceases to be true once those processes area unit running on distinct NUMA nodes. Code and alternative read-only information ought to behave a separate copy (in native memory) on every NUMA node. the price (in terms of wasted memory) is negligible as compared performance gains from creating all code references native.

When a program calls fork(2) to produce a replacement method, exec(2) to run a replacement program, to expand its address house, the desired memory should be allotted from the node-local memory pool. This creates an awfully robust affinity between processes and NUMA nodes. If it's necessary to migrate a method to a replacement NEMA node, all of its allotted code and information segments ought to be traced into native memory on the target node.

As noted on top of, the OS is choked with information structures that area unit shared among several cores. however will we tend to cut back the quantity or value of remote memory references related to those shared information structures? If the updates area unit few, thin and random, there is also very little we will do to optimize the ... however, their prices won't be high. once a lot of intensive use of shared information structures is needed, there area unit 2 general approaches: