Question

"Encode the following instruction to binary:

SUB X2, X7, 0x804"

I believe this follows R type instruction format, however, the 0x804 exceeds the bits provided in the "Rm" field.

Please provide solution and explain if possible.

Answer 1

Solution:

Giving you a solution for above instruction as

Format:
SUB rd, rs, rt [R-type]

Instruction:

SUB X2, X7, 0x804

Answer:   180400E2 //SUB X2, X7, 0X804 hexadecimal value,now convert it into binary follows,

(180400E2)₁₆ = (00011000000001000000000011100010)₂

_so,

Your binary code for above instruction is:::--- 00011000000001000000000011100010

Purpose:
To subtract 32-bit integers. If overflow occurs, then trap.

Description:
rd <- rs - rt
The 32-bit word value in GPR rt is subtracted from the 32-bit value in GPR rs to produce a 32-bit result. If the subtraction results in 32-bit 2's complement arithmetic overflow then the destination register is not modified and an Integer Overflow exception occurs. If it does not overflow, the 32-bit result is placed into GPR rd.

Restrictions:
On 64-bit processors, if either GPR rt or GPR rs do not contain sign-extended 32-bit values (bits 63..31 equal), then the result of the operation is undefined.

Operation:
if (NotWordValue(GPR[rs]) or NotWordValue(GPR[rt])) then UndefinedResult() endif
temp <- GPR[rs] - GPR[rt]
if (32_bit_arithmetic_overflow) then
 SignalException(IntegerOverflow)
else
 GPR[rd] <- temp
endif

SUBU performs the same arithmetic operation but, does not trap on overflow.