Question

Question 1. Answer the following questions on MIPS Instruction Set.
a) Show the minimal sequence of MIPS instruction for the following pseudocode segment:

A[3] = A[10] + B;

Assume that B corresponds to register $t3 and the array A has a base address of 1000C41016 which is required to be loaded to register $t0 in your code. Provide comments for each line of your MIPS instruction.

b) Assume that Loop starts at memory location 0xC010. Provide a) instruction format of each MIPS instruction, b) encode each MIPS instruction into hexadecimal format and c) show each instruction field. Use the reference shown in Page 7 and 8, or MIPS Reference Data Green Card.

Loop :

sub $t3, $t1, $t2

lw $s2, 4($t3)

bne $s0, $s2, Exit

j Loop

Exit: …

Answer 1

(a)
A[3] = A[10] + B;

lw $t1, 40($t0)       //$t1 = A[10]
add $t1, $t1, $t3   //$t1 = A[10] + B
sw $t1, 12($t0)       // A[3] = A[10] + B

(b)
sub $t3, $t1, $t2
R-format

opcode       rd           rs   rt   shamt      funct
000000   01001   01010   01011   00000   100010

Hexadecimal = 0x012A5822
-------------------------------------------------------------------------------
lw $s2, 4($t3)
I-format

opcode        rs           rt               offset
100011   01011   10010   0000000000000100

Hexadecimal = 0x8D720004
-------------------------------------------------------------------------------
bne $s0, $s2, Exit
I-format
offset = 1

opcode      rs            rt              offset
000101   10000   10010   0000000000000001

Hexadecimal = 0x16120001
-------------------------------------------------------------------------------
j Loop
J-type
Address of Loop = 0xC010 (1100 0000 0001 0000)
right shift (1100 0000 0001 0000) by 2 bit
Target = 0011 0000 0000 0100

opcode            target
000010   00000000000011000000000100

Hexadecimal = 0x08003004