Question

Input

The input variables will be named:

- Op1 - first operand
- Op2 - second operand
- shiftNum - shift amount

Output

The output will be in registers only. The registers to contain the results are:

R3 - And of operands
R4 - Or of operands
R5 - Exclusive Or of operands
R6 - Bit Clear of operands
R7 - Left Logical Shift of first operand by shift value
R8 - Right Logical Shift of first operand by shift value
R9 - Right Arithmetic Shift of first operand by shift value
R10 - Not operation on first operand

Use of any other registers for the results will not get credit for that part of the assignment.

Sample Input and Output

Your program will be tested using various values. Sample execution data:

Op1: 75
Op2: 42
shiftNum: 3

Sample results:

R3: 0x0A
R4: 0x6B
R5: 0x61
R6: 0x41
R7: 0x258
R8: 0x09
R9: 0x09
R10: 0xFFFFFFB4

Notes

You will need to understand ARM shifting before you can complete this assignment.

Answer 1

Area pgm,code, readonly

entry

main

LDR R11,=OP1 ; load address of op1 in R11

LDR R1,[R11] ;value of op1 is loaded in R1

LDR R11,=OP2

LDR R2,[R11] ;value of op2 is loaded in R2

LDR R11,=SHIFTNUM

LDR R0,[R11] ; value of shifnum loaded in R0

AND R3,R1,R2 ; R3=R1 AND R2

ORR R4,R1,R2 ;R4=R1 OR R2

EOR R5,R1,R2 ;R5=R1 XOR R2

BIC R6,R1,R2 ; R6=R1 BIC R2 =R1 AND(~R2)

MOV R7,R1 LSL R0 ; R7=R1 << R0 i.e. R1 will be shifted left R0 times

MOV R8,R1 LSR R0 ; R8=R1 >> R0, i.e. R1 will be shifted right R0 times

MOV R9,R1 ASR R0 ; R1 will be shifted right R0 times including sign bit (arithmetic shift)

EOR R10,R1,0XFFFFFFFF ; R10=~(R1), when a bit is xored with 1, it will be toggled, 1⊕ 1=0, 0 ⊕ 1=1

; here declare the var1,var2 and shiftnum with values required