Assume a byte-addressable memory consisting of 1G (230) bytes. A Direct Mapped Cache contains 256 (28) blocks of 2048 (211) bytes each.
Therefore the 30 bits address is partitioned into three areas of the following sizes (in bits):
offset | bits |
block | bits |
tag | bits |
In summary :
Following is the physical-address fabrication :
Tag | Block | Offset |
A29 - A19 | A18 - A11 | A10 - A0 |
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