Question

Implement the following output F with a CMOS circuit.

A | B | C | D | F |

0 | 0 | 0 | 0 | 1 |

0 | 0 | 0 | 1 | 1 |

0 | 0 | 1 | 0 | 1 |

0 | 0 | 1 | 1 | 1 |

0 | 1 | 0 | 0 | 1 |

0 | 1 | 0 | 1 | 0 |

0 | 1 | 1 | 0 | 0 |

0 | 1 | 1 | 1 | 0 |

1 | 0 | 0 | 0 | 1 |

1 | 0 | 0 | 1 | 1 |

1 | 0 | 1 | 0 | 1 |

1 | 0 | 1 | 1 | 1 |

1 | 1 | 0 | 0 | 0 |

1 | 1 | 0 | 1 | 0 |

1 | 1 | 1 | 0 | 0 |

1 | 1 | 1 | 1 | 0 |

Answer #1

#9) You are to implement the following function
F(A,B,C,D,E,F) which outputs a 1 whenever the binary number
represented by ABCDE is ODD and 0 otherwise. A is the MSB and E is
the LSB.
Draw the function F(A,B,C,D,E,F) and show the work that led you
to that answer.
Since I am not so sadistic as to have you draw
the truth table of a 6 variable function and draw the K-map of such
a function, you should realize, as a...

Logic Circuit
Problem #3
Given the following logic function: F(a,b,c,d) = ?
m(0,3,7,9,11,13,15)+?d(4,6,8) use a Karnaugh Map to, a) Find a
minimal SOP expression Answer: F(a,b,c,d) = b) Find a minimal POS
expression
Answer: F(a,b,c,d) =
Problem #4
Implement the function F(a,b,c,d) given in problem #3 using two
3-to-8 decoders, both active low enabled and active low output.
F(a,b,c,d) = ? m(0,3,7,9,11,13,15)+?d(4,6,8)
Answer:
Problem #5
Implement the function in the previous problem: F(a,b,c,d) = ?
m(0,3,7,9,11,13,15)+?d(4,6,8), using a single 4...

In Logisim, implement the following function, and name your
circuit as YourName_Q1
? = (? ⊕?)` + (? ?)
A. Insert a JPEG image of your circuit:
B. Simulate your circuit according to the below inputs, and
insert an image of your output
If x = 1 , y = 0, and z = 1.

A
switching circuit has three inputs
(A, B, C) and one
output
(Z).
If
A= 0, the
output Z is the exclusive-OR of B and C. If
A = 1, the
output is the equivalence of
B and C.
A.
Find the
truth table for Z.
B.
Write
the
minterm expansion
for Z in decimal form and in terms of A, B, C.
C.
Write
the
maxterm expansion
for Z in decimal form and in terms of A, B, C....

Design a combinational circuit with 4 inputs (A, B, C, D) and
two outputs (F, G): The F output becomes ‘1’ when the corresponding
decimal value represented by the 4 input bits is divisible by 3
(for example, F=1 when input combination is 0011; as 0011is 3 in
decimal that is div. by 3). The G output becomes ‘1’ when the
corresponding decimal value represented by the 4 input bits is
divisible by 5.
Also, mention how many gate delays...

Find the SOP function for F from the given 4: 1 multiplexer and
design the CMOS circuit for F:

1) Implement the given logic function using a 4:1 MUX. (Ref: Lec
16, slide 5)
F(A,B,C) = Σm(0,1,3,7)
Show the truth table, the 4:1 MUX schematic with the inputs,
select inputs and the output.
2) For an 8:3 priority encoder:
a) Draw the schematic.
b) Write the truth table.
c) Write the Boolean expressions for each of the outputs in
terms of the inputs.
d) Draw the logic circuit for the outputs in terms of the
inputs.

Implement the following circuit to test the characteristics of
a D flip flop.
Note:
Using a clock input to operate the flip-flop is rather
quickly.
You may wish to select the slow motion of the clock OR
to use a simple binary input device instead of a clock input
device.
Verify the flip flop state table.
Q(t+1) = D, is the characteristic equation.
Characteristic Table Excitation Table
==================== ===================
D Q(t+1) Operation Q(t) Q(t+1) D
==================== ===================
0 0 Reset...

Implement the following circuit to test the characteristics of a
D flip flop.
Note:
Using a clock input to operate the flip-flop is rather
quickly.
You may wish to select the slow motion of the clock OR
to use a simple binary input device instead of a clock input
device.
Verify the flip flop state table.
Q(t+1) = D, is the characteristic equation.
Characteristic Table Excitation Table
==================== ===================
D Q(t+1) Operation Q(t) Q(t+1) D
==================== ===================
0 0 Reset...

(a) Implement the following Boolean function F using the
two-level forms: AND-NOR and
OR-NAND , F = B'D'+ AC'D'+ACD+A'CD'
(b) Convert the above problem into standard POS, expression using
the truth table and minimize
using K-map.
(c) Design a combinational circuit with four inputs and one output.
The Algebraic expression
must be minimized using K-MAP. The output must be one for the
digits which are present in
your Roll Number Digits. Any duplications must be avoided.

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