While keeping r unchanged, redesign the inverter circuit of Example 14.1 to lower its static power dissipation to half the value found. Find the W?L ratios for the new design. Also find tPLH, tPHL, and tP, assuming that C remains unchanged. Would the noise margins change?
This is example 14.1: pseudo-NMOS inverter fabricated in a 0.25-?m CMOS technology for which ?nCox = 115 ?A/V2, ?pCox=30?A/V2, Vtn =?Vtp =0.5V,andVDD =2.5V.Letthe W?L ratioofQN be (0.375 ?m ? 0.25 ?m) and r = 9.
Get Answers For Free
Most questions answered within 1 hours.