Design a module that can perform a binary-coded decimal (BCD) addition. You have two 4-bit BCD (decimal digits 0 to 9) inputs “a” and “b” and an 8-bit output “x” which represents a two digit BCD number.
X [7:4] represents the upper BCD digits
X [3:0] represents the lower BCD digits
In the Verilog file, please code a BCD adder. It should follow the following format.
module bcd_adder( a,b,x );
input wire [3:0] a;
input wire [3:0] b;
output reg [7:0] x;
...
module bcd_adder(a, b, x);
input wire [3:0] a;
input wire [3:0] b;
output reg [7:0] x;
wire [7:0] sum;
wire [7:0] result;
assign sum = a + b;
assign result = (sum[3:0] > 4'b1001 || sum[4] == 1'b1)? (sum + 4'b0110) : sum;
always @ (result)
begin
x <= result;
end
//Simulated
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