(3) Use K-map to simplify the following expressions, and
implement them with two-level NAND gate circuits:...
(3) Use K-map to simplify the following expressions, and
implement them with two-level NAND gate circuits:
(a) F(A,B,C,D)=A’B’C+AC’+ACD+ACD’+A’B’D’
(b) F(A,B,C)=(A’+B’+C’)(A’+B’)(A’+C’)
In addition to NAND and NOR, find four more two-input boolean
functions that are each individually...
In addition to NAND and NOR, find four more two-input boolean
functions that are each individually universal. Give a logic
expression for each of your functions, using AND, OR, and NOT, and
prove that each of these functions is individually universal, by
showing for example that you can implement AND, OR, and NOT with
your function. You may use the constant values zero and one as
inputs to your universal functions to implement other functions.
Name your functions f1, f2,...
1) Provide a NAND circuit implementation for this function:
F(x,y,z) = xyz’ + x’y’z’ + xy’z’...
1) Provide a NAND circuit implementation for this function:
F(x,y,z) = xyz’ + x’y’z’ + xy’z’ + x’yz’ + xy’z + x’yz
2) A 3-bit parity check circuit will output a 1 for input having
even number of 1’s. Provide the truth table, Karnaugh map for the
minimized function, and circuit implementation using PLA.
1. Implement the given logic function using a 4:1 MUX. F(A,B,C)
= Σm(0,1,3,7)
Show the truth...
1. Implement the given logic function using a 4:1 MUX. F(A,B,C)
= Σm(0,1,3,7)
Show the truth table, the 4:1 MUX schematic with the inputs,
select inputs and the output.
2. For an 8:3 priority encoder:
a) Draw the schematic.
b) Write the truth table.
c) Write the Boolean expressions for each of the outputs in
terms of the inputs.
d) Draw the logic circuit for the outputs in terms of the
inputs.
1) Implement the given logic function using a 4:1 MUX. (Ref: Lec
16, slide 5)
F(A,B,C)...
1) Implement the given logic function using a 4:1 MUX. (Ref: Lec
16, slide 5)
F(A,B,C) = Σm(0,1,3,7)
Show the truth table, the 4:1 MUX schematic with the inputs,
select inputs and the output.
2) For an 8:3 priority encoder:
a) Draw the schematic.
b) Write the truth table.
c) Write the Boolean expressions for each of the outputs in
terms of the inputs.
d) Draw the logic circuit for the outputs in terms of the
inputs.
Logic Circuit
Problem #3
Given the following logic function: F(a,b,c,d) = ?
m(0,3,7,9,11,13,15)+?d(4,6,8) use a Karnaugh...
Logic Circuit
Problem #3
Given the following logic function: F(a,b,c,d) = ?
m(0,3,7,9,11,13,15)+?d(4,6,8) use a Karnaugh Map to, a) Find a
minimal SOP expression Answer: F(a,b,c,d) = b) Find a minimal POS
expression
Answer: F(a,b,c,d) =
Problem #4
Implement the function F(a,b,c,d) given in problem #3 using two
3-to-8 decoders, both active low enabled and active low output.
F(a,b,c,d) = ? m(0,3,7,9,11,13,15)+?d(4,6,8)
Answer:
Problem #5
Implement the function in the previous problem: F(a,b,c,d) = ?
m(0,3,7,9,11,13,15)+?d(4,6,8), using a single 4...
Using K-map to simplify the following Boolean function:
F(A,B,C,D) = m(1,3,5,6,7,9,11,12,13,15)
Using K-map to simplify the following Boolean function:
F(A,B,C,D) = m(1,3,5,6,7,9,11,12,13,15)
Using K-map to simplify the following Boolean function:
F(A,B,C,D) = å
m(1,3,5,6,7,9,11,12,13,15)
Using K-map to simplify the following Boolean function:
F(A,B,C,D) = å
m(1,3,5,6,7,9,11,12,13,15)
Design a combinational circuit with 4 inputs (A, B, C, D) and
two outputs (F, G):...
Design a combinational circuit with 4 inputs (A, B, C, D) and
two outputs (F, G): The F output becomes ‘1’ when the corresponding
decimal value represented by the 4 input bits is divisible by 3
(for example, F=1 when input combination is 0011; as 0011is 3 in
decimal that is div. by 3). The G output becomes ‘1’ when the
corresponding decimal value represented by the 4 input bits is
divisible by 5.
Also, mention how many gate delays...