Question

A four-input (A1, A2, B1, B2) and two-output (Y1, Y2) “BUT” gate has the following behavior:

• Y1 is 1 if A1 and B1 are 1 but either A2 or B2 is 0

• Y2 is defined symmetrically

a. Write logic expressions for Y1 and Y2 outputs of the BUT gate

b. Draw the corresponding logic diagram using AND gates, OR gates, and inverters

c. Write a behavioral-style Verilog model for the BUT gate

Answer 1