Question

Design a 1-bit Full adder using one 3-bit majority encoder and a set of NAND gates

Answer #1

Design Half-adder and Full-adder circuits using truth tables.
Use only 2-input NAND gates

Q1)Design a 3-bit full adder by using a 8x3 Decoder.,
Q2)Design a digital circuit by using a 8x1 multiplexer
implementing the following Boolean equation.F(A, B, C, D) =∑(2, 3,
5, 7, 8, 9, 12, 13, 14, 15)

Design a Single cell 1 bit Carry propagate (or Ripple Carry
Adder) full adder.
a. Generate the truth table
b. Using K-map or Boolean algebra, determine the logical
expression for Carry out (C-out) and Sum (S) Outputs
C. Draw the circuit diagram of the outputs in step b

Design a 4-bit adder-subtractor circuit using the 4-bit binary
Full adders (74LS83) and any necessary additional logic gates. The
circuit has a mode input bit, M, that controls its operation.
Specifically, when M=0, the circuit becomes a 4-bit adder, and when
M=1, the circuit becomes a 4-bit subtractor that performs the
operation A plus the 2’s complement of B.Where A and B are two
4-bits binary numbers. That is,
* When M=0, we perform A+B, and we assume that
both...

Design a full 4-bit adder.
Include analysis, explanation and simulation (can be in multisim,
proteus or liviwire).

Design a circuit that computes F = 4.5A (4.5 times A) using a
full adder. Input A is a 4-bit number (A3A2A1A0) and A is an even
number. A3 is the MSB.

Use contraction beginning with a 4-bit adder-subtractor with
carry in, to design a 4-bit circuit without carry out that
increments its input by 0010 for input S=0 and decrements its input
by 0010 for input S=1. Perform the design by designing the distinct
1-bit full adder cells needed and indicating the type of cell used
in each of the four bit positions.

. Design Verilog modules for an 8 to 3 encoder and an 8 to 3
priority encoder. Both modules have an enable input (E), an 8 - bit
input (Data), and a 3 - bit output (O).

Implement a full Subracter using a minimum number of gates.
Compare the logic equations for the full adder and full
subtracter.

Implement a 2-bit adder using only a 32x3 ROM. The adder adds
two 2-bit numbers, {A1 A0} and {B1 B0}. The adder also has a
carry-in (Cin) input. Thus there are 5 inputs: A1 A0, B1 B0, Cin.
There are 3 outputs, a 2-bit sum (S1 S0) as well as a carry-out
(Cout). Include a diagram of the ROM: label inputs/outputs
correctly and show the contents of ROM cells (0's/1's).

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