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Design and code a Verilog module to convert a 4 digit unsigned BCD whole number into...

Design and code a Verilog module to convert a 4 digit unsigned BCD whole number into a 14 bit binary number.

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Answer #1
module bcd2bin_direct
   (
    input wire [3:0] bcd3, bcd2, bcd1, bcd0,
    output wire [13:0] bin
   );
   wire [13:0] thousand;
   wire [9:0]  hundred;
   wire [6:0]  ten;

   // thousand  = 512 + 256 + 128 + 64 + 32 + 8
   assign thousand = (bcd3 << 9) + (bcd3 << 8)+ (bcd3 << 7) + (bcd3 << 6) + (bcd3 << 5) + (bcd3 << 3);
   
  // hundred = 64 + 32 + 4
   assign hundred = (bcd2 << 6) + (bcd2 << 5) + (bcd2 << 4);

   // ten  = 8 + 2
   assign ten = (bcd1 << 3) + (bcd1 << 1);

   assign bin = thousand + hundred + ten + bcd0;

endmodule
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