Question

We wish to design a 4-bit PWM to control the brightness of a 7-segment LED display. A PWM circuit will be constructed with a 74163 (4-bit binary counter) and a 7485 (4-bit magnitude comparator). The inputs and output are:  clk: DE1 50 MHz clock signal.  d: 4-bit input control signal specifying the duty cycle of output pulse.  p: 1-bit output pulse with the specified duty cycle. The d signal is treated as a 4-bit unsigned binary number. Assume that its value is m, the duty cycle of p is m/16 (i.e., 0/16, 1/16, 2/16, 3/16, … , 14/16, 15/16). The PWM circuit will be used to control the brightness of the LED display.

Answer 1