Question

Design an Op-Amp Circuit that takes an input from a low current capacity voltage source (i.e. a high internal impedance source) with voltage range of -15mV to 15mV, amplify it, adds a DC offset so that the voltage is always positive filter it (LPF 1, 18.3 KHz) and the convert it into digital output (reference voltage of ADC 12V). Also determine the minimum sampling rate of ADC

Answer 1

Amplification stage

This circuit contains 2 operations:

- Summing non-inverting

- Low pass filter 1st order.

Summing Amplifier

The gain of the summing amplifier with R1=R4 is:

The Vin voltage must be amplified up to a signal, and the output should have a DC offset of+6V, to have a centered signal with no negatives, the gain is:

-Only consider the Vin input:

With:

R3=1K

R2=799K

The offset should make the output 0V when the input is -15mV

The R5 and R6 resistances generate 15mV constant voltage to set Voff.

R4 and R5 values are chosen purposely high, so R6 is neggligible in parallel to R4, thus, getting a more stable dc value for Voff.

FILTER

The corner frequency of the 1st order filter is 18.3KHz, and the dominant pole of the circuit is:

Thus, C1 is:

In Band Pass, for a 1KHz signal, the output is:

At the corner frequency:18.3KHz

The Gain is:

The difference between the gainin the band pass and 18KHz:

The gain at f=18.3KHz is -3dB below the gain in the band pass, 18.3KHz is effectively the corner frequency

Sampling Rate

The minimum sampling rate to avoid aliasing is given by the Nyquist frequency, the band width of a signal is half the sampling rate frequency:

The Band Width is equivalent to the band pass of the filter, then the minimum sampling frequency is: