Question

a. Sketch the transistor level schematic of a single domino gate that implements the function Y = (A•B•C) + D. The dynamic section of the domino gate should use a foot transistor. (4 points)

b. If the output must drive a load of 240 units of capacitance and the input may present a load of 30 units of capacitance, what is the path effort for a rising transition from input A to output Y (3 points) e. What is the minimum delay (in τ) for a rising transition from input A to output Y? (3 points) f. Resize the transistors to achieve this delay. (4 points)

Answer 1