Give the result of the following operations in Verilog binary number format, with the proper bitwidth:
a) ~^7'b110_0111
b) 4'd7 + 3'h2
c) 8'hC7 ^ 8'h69
d) {{2{1'b1, {3{2'b01}}}}, 2'b1}
e) 6'b10_0000 | 6'b10_1110
f) 6'b10_0000 || 6'b10_1111
g) !8'd42
h) 5'b11010 <<2
i) -(12'hAAA)
j) 0 ? 1:2
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