Mealy state machines.
(a) Design a Mealy state machine to detect the sequence 10010. There is a single input “x” and a single output “z”. The output is set to 1 when the sequence is detected. Design the state machine using gates and flip-flops in the standard way, i.e., begin with a state transition diagram and state transition table, do plain state assignment (e.g., for three state variables, first state is 000, next is 001, and so on), use K-maps to derive minimized next-state and output equations (exploit don’t-care states if applicable), and synthesize the circuit schematic from the equations.
(b) Repeat problem (a), but this time use a shift register to design your circuit.
(c) Which approach was easier? Which approach was less expensive? Explain.
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