Question

My question: what is the truth table for full-comparator??

Full question: Design a comparator circuit for binary numbers using only NAND gates. It should take as input two numbers represented in standard binary, X and Y, and produce two outputs, G and L, which indicate that X is Greater than or Less than Y, respectively. If both outputs are zero, it indicates that the values are equal. Design a half-comparator, full-comparator, and a full four-bit comparator. With nothing more than multiple copies of your circuit, you should be able compare numbers with an arbitrary number of bits. Turn in the truth tables, Karnaugh maps, logic expressions, and circuit diagrams for each of your individual circuits, plus a block diagram for the complete circuit. Determine the number of gate delays required by your design for a 32-bit comparator. Minimize the number of gates.

Answer 1

TRUTH TABLE FOR:

1-Bit Magnitude Comparator:

INPUT	OUTPUT
A	B	A<B	A=B	A>B
0	0	0	1	0
0	1	1	0	0
1	0	0	0	1
1	1	0	1	0

2-Bit Magnitude Comparator:

INPUT	OUTPUT
A1	A0	B1	B0	A<B	A=B	A>B
0	0	0	0	0	1	0
0	0	0	1	1	0	0
0	0	1	0	1	0	0
0	0	1	1	1	0	0
0	1	0	0	0	0	1
0	1	0	1	0	1	0
0	1	1	0	1	0	0
0	1	1	1	1	0	0
1	0	0	0	0	0	1
1	0	0	1	0	0	1
1	0	1	0	0	1	0
1	0	1	1	1	0	0
1	1	0	0	0	0	1
1	1	0	1	0	0	1
1	1	1	0	0	0	1
1	1	1	1	0	1	0

I hope this will help you.