Question 3 (1 point)
Which of the following reasons is why SR latches are not used to store modern memory?
Question 3 options:
Ability to store 1 bit. |
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Immune to timing issues. |
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Ability to be implemented with gates. |
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Timing issues. |
Question 4 (1 point)
Which of the following differentiates a latch and a flip flop?
Question 4 options:
Usage of a clock. |
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Cannot toggle. |
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Significantly less gates needed for implementation. |
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Ability to store more than one bit. |
Question 5 (1 point)
The D flip flop
Question 5 options:
Toggles the output value. |
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Has a separate set and reset input. |
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Delays input from affecting the output by one clock cycle. |
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Immediately sets the output to be the input. |
Question 6 (1 point)
The toggle flip flop
Question 6 options:
Uses the input to invert the output. |
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Sets the output to be the input delayed by a clock cycle. |
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Sets the output to be the input. |
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Has two inputs in addition to the clock input. |
Question 7 (1 point)
A clock is used in circuits for
Question 7 options:
Nothing, there are no physical constraints in circuits. |
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When to turn in an assignment. |
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Propagation delays. |
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Supplying power to the entire circuit when it needs to activate. |
Question 8 (1 point)
A clock is usually incorporated into a circuit with
Question 8 options:
A xor gate. |
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An or gate. |
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An and gate. |
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A nand gate. |
Question 9 (1 point)
Which of the following inputs is the JK flip flop designed to allow?
Question 9 options:
0 0 |
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0 1 |
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1 0 |
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1 1 |
Question 10 (1 point)
Input changes during a clock pulse automatically change the output in all circuits.
Question 10 options:
True | |
False |
Answer:-
3) Timing issues. It will show inconsistent or undefined value for 1 1 as input.
4) cannot toggle.
Latches are once set,the value cant be changed but in flip flop we can change to values to be stored.
5) Delays input from affecting the output by one clock cycle.
D flip flop is used as delay generator i.e it will give same output as input but with some delay.
6) uses the input to invert the output.
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