Question

Design a sequential circuit that will negate four-bit two's complement integer. That is if, for example,if...

Design a sequential circuit that will negate four-bit two's complement integer. That is if, for example,if the input is 3 (in two's compliment representation) the output should be -3 (in two's complement notation). Start with the truth table, next write the formulas for each output in SOP form, next simplify formulas using Karnaugh maps and finally draw the simplified circuit.

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Circuit diagram for above formula is as below :

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