Question

1. The memory units that follow are specified by the number of words times the number of bits per word. How many address lines and input/output data lines are needed in each case? (a) 8K X 16 (b) 2G X 8 (c) 16M X 32 (d) 256K X 64

2. Give the number of bytes stored in each memory unit in question 1.

3. Word number 563 decimal in the memory shown in Fig. 7.3 (see Mano-Ch7.pdf) contains the binary equivalent of 1,212 decimal. List the 10-bit address and the 16-bit memory content of the word in binary and hexadecimal.

4. Show the memory cycle timing waveforms for the write and read operations. Assume a CPU clock of 150 MHz and a memory cycle time of 20 ns similar to that shown in Fig. 7.4 (see Mano-Ch7.pdf).

5. Enclose the 4 X 4 RAM of Fig. 7.6 (see Mano-Ch7.pdf) in a block diagram showing all inputs and outputs. Assuming three-state outputs, construct an 8 x 8 memory using four 4 x 4 RAM units.

6. (a) How many 32K X 8 RAM chips are needed to provide a memory capacity of 256K bytes? (b) How many lines of the address must be used to access 256K bytes? How many of these lines are connected to the address inputs of all chips? (c) Using absolute decoding, how many lines must be decoded for the chip select inputs? Specify the size of the decoder.

7. (a) How many 128 X 8 RAM chips are needed to provide a memory capacity of 2048 bytes? (b) How many lines of the address bus must be used to access 2048 bytes of memory? How many of these lines will be common to all chips? (c) How many lines must be decoded for chip select? Specify the size of the decoders.

8. A microprocessor uses RAM chips of 1024 X 1 capacity. (a) How many chips are needed and how should their address lines be connected to provide a memory capacity of 1024 bytes? (b) How many chips are needed to provide a memory capacity of 16K bytes? Explain in words how the chips are to be connected to the address bus.

9. One of the first minicomputers, the PDP-8, had a l2-bit address bus. What was the last address in this computer's memory space? Give the answer in decimal, binary, octal, and hexadecimal.

10. Draw a memory map of a system with a 12-bit address bus, dividing the memory space into 2K blocks. Indicate the hexadecimal address of the first and last address in each block.

11. The 68000 microprocessor has a 24-bit address bus. Into how many 64K blocks can the 68000's memory space be divided?

12. What are the first and last addresses of the 1 Meg block of memory at the top of the 68000's address space?

13. If a 64K( memory space is divided into 8K blocks, what are the beginning and ending addresses of block #3? (Remember, the block starting at address 0 is block #0.)

14. A certain computer has a 4Meg address space. How many bits wide is this computer's address bus?

15. A popular microcontroller is the MCS-51 from Intel Corp. Two versions are the 8751 with an on-chip EPROM and the 8051 with an on-chip mask-programmed ROM. Assume the 8751 sells for $30 in any quantity and the 8051 sells for $3 plus a $10,000 setup fee. (a) How many units are necessary to justify use of an 8051 device? (b) What is the savings for projected sales of 3,000 units of the final product if an 805I is used instead of an 8751?

Answer 1

1.
a) 8x16

• Number of words = 8
• Number ofbits per word= 16
• So, in 8x16, the number of address lines is obtainedby number of words, that is,
• 8 = 2^3
• Therefore, it requires 3 address lines.
• The input-outputlines are calculated as, sum of address lines and the number of bits, that is,
• = 3 + 16
• = 19
• Therefore, it requires 191/0 lines.

b) 2Gx8

• Number of words=2G
• Number ofbits per word= 8
• So, in 2G x 8, the number of address lines is obtainedby number of words, that is,
• 2G = 2x 2^30
• =2^31
• Therefore, it requires 31 address lines.
• The input-outputlines are calculated as, sum of address lines and the number of bits(data lines), that is,
• = 31 + 8
• = 39
• Therefore, it requires 391/0 lines.

c) 16M x 32

• Number of words= 16M
• Number ofbits per word= 32
• So, in 16M x 32, the number of address lines is obtainedby number of words, that is,
• 16M =2^4 x 2^20
• =2^24
• Therefore, it requires 24 address lines.
• The input-outputlines are calculated as. sum of address lines and the number of bits(data lines), that is,
• = 24 + 32
• = 76
• Therefore, it requires 76 I/0 lines.

d) 256Kx 64

• Number of words= 256K
• Number ofbits per word= 64
• So, in 256K x 64, the number of address lines is obtainedby number of words, that is,
• 256K = 2^8 x 2^10
• = 2^18
• Therefore, it requires 18 address lines.
• The input-outputlines are calculated as, sum of address lines and the number of bits(data lines), that is,
• = 18 + 64
• = 82

Therefore, it requires 82 I/0 lines.

2.

a)

• To calculate number of bytes stored in the memory, 8 words require 16 bits.
• But 8 bits is one byte and 16 bits = 2 bytes.
• Therefore, it requires 8 x 2 = 16 bytes of memory to store in each memory.

b)
To calculate number of bytes stored in the memory, 2G words require 32 bits.

• 2G = 2x 2' = So, 2'= 2147483648 words.
• But a byte is 8 bits, so 8 bits =1 byte.
• Therefore, it requires 2147483648 x 1= 214748 3648 bytes of memory to store in each memory.

c)
To calculate number of bytes stored in the memory, 2G words require 32 bits.

• 16M =2^4 x 2^20
• =2^24
• So, 2^24 = 16777216 words.
• But a byte is 8 bits, so 32 bits = 4 bytes.
• Therefore, it requires 16777216 x 4 = 67108864 bytes of memory to store in each memory.

d)
To calculate number of bytes stored in the memory, 256K words require 64 bits.

• 256K = 2^8 x 2^10
• = 2^18
• So, = 262144 words But a byte is 8 bits,
• so 64 bits = 8 bytes.
• Therefore, it requires 262144 x 8 = 2097152 bytes of memory to store in each memory.

3.

Decimal	Binary
0	0
1	2^0-0000000001
2	2^1*1 + 2^0*0-0000000010
3	2^1*1 + 2^0*1-0000000011
4	2^2*1+2^1*0+2^0*0-0000000100
5	2^2*1+2^1*0+2^0*1-0000000101
6	2^2*1+2^1*1+2^0*0-0000000110
7	2^2*1+2^1*1+2^0*1-0000000111

In the same way user can write any decimal equivalent in binary form

4.

5.

6.

a)

• 32K X 8 means that there are 32 thousand, and the 8 means that there are 8 bits(8 bits is equal to 1 byte).
• So, this means that one 32K X 8 chip can hold 32K bytes or 32 thousand bytes of data.
• If the user want 256K bytes, take 256/32. You will need 8chips.

b)

• It will need 8 lines to access the 256K bytes because of the 8 different chips.
• All the lines will be connected.

c)

• For this 256K byte RAM circuit, you will have 8 chips.
• This means that there will be 8 different addresses.
• This can be solved by using a 3-8 decoder. It will have 3 lines for the address, but 8lines will be connected to the chips.

7.

(a)

• Size of the RAM is given as 2048 bytes
• Size of one RAM chip = 128 bytes
• Therefore, the number of chips required are as follow:
• 2048.8 bits
• Number of chips = 2048*8 bits / 128*8 bits [Since, 1 byte = 8 bits]
• = 16
• Hence, the number of chips needed to provide a memory capacity of 2048 byte are
• 16•

(b)

• The number of lines is computed as follows:
• Since, the bytes are 2048.
• 2048 = 2^d
• = 2^11

Here, d is the number of address lines.
Hence, the number of lines of the address bus must be used to access 2048 bytes of memory is 11.
Now, since, number of chips are 16 which is 2^4.
Therefore, number of common address lines are as follows:
Common lines = 11 - 4
                        =7
Thus, the number of lines common to all the chips are 7.

(c)
The lines are computed as follows:

• The number of chips is 16 which is 24. Therefore, number of lines required for decoding the inputs of the chip select are 4. To select one among 16, the decoder needs 4 inputs and 16 outputs.
• Thus, 4 x 16 size decoder is needed.

8.

a)
The 8 RAM chips required to provide a memory capacity of1024bytes address buss is connected parallel to all 8 chips.

b)
The 16 x 8 chips are required of capacity 16Kbytes.
There will be 16 chip arrays of size 8.
There will be 14 bits address.
The first 4 bits will select chip array of size 8. (like in example a.) and other 10 bits will select address inside the chip array.

9.

It had a 12-bit address bus.
So, it can accommodate a maximum of 1111 1111 1111 in binary address.

• In hex decimal it will be FFF.
• In octal it will be 7777.
• In decimal it will be 4095.

10.

11.

Since it has 24-bit address bus, so it will have 2^24 spaces in memory which will be 16 MB
Let x be the number of blocks
so, x * 64k = 16 * 1024 k
so, x =256
So, 256 blocks of 64k are required.

12.

13.

it is divided into 8k blocks so total 8 blocks will be made
block 0: start address 0x0000 end address will be 0x1FFF
block 1: start address 0x2000 end address 0x3FFF
block2: start address 0x4000 end address 0x5FFF
block3: start address 0x6000 end address 0x7FFF

14.

A certain computer has a 4 Mega address space.
Address space = 4 Mega
                           = 4x10^6
                           = 2^2 x 10^6
Here, 1Mega = 10 ^6

In terms of binary 1 Kilo = 1024 => 2^10
                             1 Mega = 1024 x 1024
                                            = 2^10 x 2^10

Therefore, 4 Mega = 4 x 1024 x 1024
                                  = 2^2 x 2^10 x 2^10
                                  = 2^22

A 4 Mega address space has 22 bits wide address.

15.