Question

Assume we have a computer where the cycles per instruction (CPI) is 2.0 when all memory accesses hit in the cache. The only data accesses are loads and stores, and these total 60% of the instructions. If the miss penalty is 25 clock cycles and the miss rate is 5% (Unified instruction cache and data cache), how much faster would the computer be if all instructions and data were cache hit?

Answer 1

First compute the performance for the machine that always hits:

CPU_{execution time} = (CPU clock cycles + Memory stall cycles) * Clock cycle

=> (IC * CPI + 0) × Clock cycle = IC * 2.0 * Clock cycle

Now for the machine with the real cache, first we compute memory stall cycles:

Memory stall cycles = IC * Memory references per instruction * Miss rate * Miss penalty

=> IC * (1 + 0.6) * 0.05 * 25 × = IC * 2

where the middle term (1 + 0.6) represents one instruction access and 0.6 data accesses per instruction.

The total performance is thus

CPU execution time_cache = (IC * 2.0 + IC * 2) * Clock cycle = 4 * IC * Clock cycle

The performance ratio is the inverse of the execution times.

CPU execution time_cache /CPU execution time = 4 * IC * Clock cycle / IC * 2.0 * Clock cycle

=>The machine with no cache misses is 2 times faster.