Assume there are no forwarding, try reorganize the order of
these instructions such that these 5 instructions can be finished
sooner. Insert stall cycles only when reordering does not help.
Note that reordering instructions should not cause any incorrect
value being write into registers. Show the reordered 5
instructions, and the result in multiple-cycle diagram.
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Step 2
5 stage pipeline
IF --- Instruction Fetch
ID----- Instruction Decode
EX ---- Execution
MA------ Memory Access
WB ----- Write Back
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