Question

(20pts each) Read the following set of instructions, and answer questions. add     r5, r2, r1 lw...

  1. (20pts each) Read the following set of instructions, and answer questions.
  1. add     r5, r2, r1
  2. lw      r3, 4(r5)
  3. or      r3, r5, r3
  4. sw      r3, 0(r5)
  5. add     r2, r5, r1

Assume there are no forwarding, try reorganize the order of these instructions such that these 5 instructions can be finished sooner. Insert stall cycles only when reordering does not help. Note that reordering instructions should not cause any incorrect value being write into registers. Show the reordered 5 instructions, and the result in multiple-cycle diagram.

Homework Answers

Answer #1

Please give thumbs up if you like it

Step 2

5 stage pipeline

IF --- Instruction Fetch

ID----- Instruction Decode

EX ---- Execution

MA------ Memory Access

WB ----- Write Back

Know the answer?
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for?
Ask your own homework help question
Similar Questions
1. Read the following set of instructions, and answer questions. add r5, r2, r1 lw r3,...
1. Read the following set of instructions, and answer questions. add r5, r2, r1 lw r3, 4(r5) or r3 , r5, r3 sw r3 , 0(r5) add r2, r5, r1 b. Assume there are no forwarding, show the result in multiple-cycle diagram.
(20 pts each) Read the following set of instructions, and answer questions. or r1, r2, r3...
(20 pts each) Read the following set of instructions, and answer questions. or r1, r2, r3 or r2, r1, r4 or r1, r1, r2 Assume the following cycle times for each of the options related to forwarding: Without forwarding With full forwarding With only ALU-ALU forwarding 250ps 300ps 290ps ALU-ALU forward means there is only data forward from EX/MEM to ID/EX (which is from the output of the ALU to the input of the ALU), and no data forwarding from...
Consider the simple five-stage pipeline (Fetch, Decode, Execute, Memory, Write-back) ADD R1, R2, R3 SUB R4,...
Consider the simple five-stage pipeline (Fetch, Decode, Execute, Memory, Write-back) ADD R1, R2, R3 SUB R4, R1, R5 For the above pairs of instructions, determine how many cycles it would take to complete execution. (1) Without forwarding. (2) With forwarding.
Consider a program having following sequence of instructions, where the syntax consists of an opcode followed...
Consider a program having following sequence of instructions, where the syntax consists of an opcode followed by the destination register followed by one or two source registers: Instruction no Instructions 1 ADD R3, R1, R2 2 LOAD R6, [R3] 3 AND R7, R5, 3 4 ADD R1, R6, R0 5 SUB R2, R1, R6 6 AND R3, R7, 15 7 SUB R5, R3, R4 8 ADD R0, R1, R10 9 LOAD R6, [R5] 10 SRL R7, R0, 8 Assume the...
Consider the following MIPS code and a 5 stages processor as discussed in class, and assume...
Consider the following MIPS code and a 5 stages processor as discussed in class, and assume the loop executes 3 times: loop: lw r1,4(r7) lw r2,8(r7) lw r3,12(r7) add r1,r1, r3 sw r1,4(r7) bne r1,r2,loop addi r1,r1,42 c. Draw the execution diagram. (10 points) d. The CPI (cycles per instruction) is obtained by computing the ratio of total cycles to number of instructions. Compute the CPI for the for the pipeline on this code. (5 points)
ADVERTISEMENT
Need Online Homework Help?

Get Answers For Free
Most questions answered within 1 hours.

Ask a Question
ADVERTISEMENT