Question

Given the following sequential list of VEX operations:

A. add $r3 = $r1, $r2

B. sub $r8 = $r1, $r3

C. sub $r7 = $r1, 2

D. add $r1 = $r1, 1

E. mpy $r6 = $r3, $r2

Which VEX operations can be scheduled simultaneously to make up the second VLIW instruction? The constructed schedule should satisfy the following conditions: Assume infinite resources and no limit to the number of operations scheduled to a single instruction. Operations that are scheduled in the same instruction should never have a case where an operation writes to a register that a different operation is reading from. You are allowed to re-order operations as long as dependencies are obeyed. An operation cannot be scheduled unless all of its dependencies are satisfied. Output results of an instruction are available only after it commits (for the purposes of part 1 assume each operation has 1 cycle latency). Assume that no register renaming or pipeline support exists on the target processor. You should construct the optimal schedule under the above constraints. An optimal schedule is the one that exhibits the fastest completion time (fewest cycles) and also schedules all operations as early as possible. Note: You will need to construct the entire schedule, but we are only asking for the second VLIW instruction for grading purposes.

1. Assume each VLIW instruction consumes 2 cycles.

Calculate the average IPC, which is a ratio of the total number of operations executed to that of the total number of cycles taken.

Answer 1