Consider the following memory hierarchy.
Unit Access Latency Local Miss Rate
-----------------------------------------------------------------------
L1 1.5 cycles 80%
L2 15 cycles 65%
Memory 150 cycles 100%
What is the average memory access time?
(Hint: AMAT= hit time + miss rate * miss penalty)
Given
L1 : 1.5 clock cycles and hit rate = 80% so , miss rate is 20%
L2 : 15 clock cycles and hit rate = 65% so , miss rate is 35%
Memory : 150 cycles and 100%
So , miss penalty of L1 = hit time of L2 + miss time of L2* miss penalty of L2 = 15 + 0.35*150 - - - - ( multiplied by 150 because if L2 misses it has to go to memory )
= 67.5 - - - - (a)
We know average memory access time = hit time + miss rate * miss penalty
= 1.5 + 0.2*(67.5 ) - - - from (a)
= 1.5 + 13.5
= 15 cycles.
Note : Please do ask any queries regarding the solution , I will be glad to help.
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