Question

Assume that you are asked to design a logic circuit with the following specifications, using

K-map. The circuit has two inputs X and Y and three outputs O0, O1 and O2. This circuit

operates as follows: (1) the output (O0) will be high when X<Y only, (2) the output (O1)

will be high when X>Y only, and (3) the output (O2) will be high when X=Y only.

a. (3 points) Create the truth table for this logic circuit.

b. (3 points) Show the Karnaugh maps

c. (4 points) Draw the schematic, using logic gates.

d. (1 point) Describe briefly the behaviour of this circuit. In other words, what is the function of this circuit?

Answer 1

Assuming we are dealing 1-bit i/p {basically 1 bit magnitude comparator}. The truth table would be:

a)

X	Y	O0 (X < Y)	O1 (X > Y)	O2 (X = Y)
0	0	0	0	1
0	1	1	0	0
1	0	0	1	0
1	1	0	0	1

b)

karnaugh map for O0

	Y =0	Y =1
X =0	0	1
X =1	0	0

= X'Y

karnaugh map for O1

	Y =0	Y =1
X =0	0	0
X =1	1	0

= XY'

karnaugh map for O2

	Y =0	Y =1
X =0	1	0
X =1	0	1

= XY + X'Y' (X ex-nor Y)

c)

d) It is a 1 bit magnitude comparator.